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Research Assistant in Tsetlin Machines

Requisition ID:  1152
Location: 

Newcastle, GB

Contract Type:  Fixed Term
Posted Date:  07-Nov-2019

Research Assistant School of Engineering, Microsystems Group Faculty of Science, Agriculture & Engineering

We are a world class research-intensive university. We deliver teaching and learning of the highest quality. We play a leading role in economic, social and cultural development of the North East of England. Attracting and retaining high-calibre people is fundamental to our continued success.

Salary: £28,331 - £30,046 

Closing Date: 7 December 2019

                                                                

The role

This project will build Tsetlin Machine (TM) based AI hardware and complement the core hardware with intelligent energy management using our existing methods and tools. The goal is develop AI systems particularly suitable for ubiquitous applications that can survive natural energy variations stemming from the energy harvesters autonomously, removing the manual maintenance (like recharging or replacing batteries) needs completely.

 

The role of this Research Associate will be to develop power-compute interface for TM based AI hardware prototype including a power management unit following the results of our prior project SAVVIE. The design will lead to the development of a PCB to house both the TM-based chip developed by the other research associate and the power management circuit, forming the basis for a new survivable intelligent sensor for applications such as predictive maintenance and smart wearable. In this work the research associate will closely liaise with Nokia Bell Labs and Temporal Computing Ltd.

 

You should have a degree in Electrical and Electronic Engineering or Computer Engineering. Good hardware design skills with fundamental knowledge of AI and hardware description languages, power management circuits and asynchronous circuits are essential for this project.

 

As part of our commitment to career development for research staff, the University has developed 3 levels of research role profiles.  These profiles set out firstly the generic competences and responsibilities expected of role holders at each level and secondly the general qualifications and experiences needed for entry at a particular level.

 

This Impact Accelerator Account (IAA) project will build a survivable artificial intelligence hardware platform, suitable for new generation of batteryless pervasive applications -- drawing from the tools and methods developed in our previous EPSRC-funded projects within Microsystems group – STEP and SAVVIE. The duty of this post will cover Tasks 2 and 3 of the Project, defined as follows.

Part 1 (Task 2 of the project): Develop power-compute co-design methodology initiated in the SAVVIE project Energy events, generated from the power supply management unit, will be used to control the power/performance tradeoffs in the AI compute circuits. The interaction between power generation, management and computational algorithms will be automated by our in-house design methods and simulated using standard Electronic Design Automation (EDA) tools.

Part 2 (Task 3 of the project): Implement the complete power-compute system as a System-on-a-Chip and fabricate it as the first prototype of a truly survivable AI system, aimed for pervasive applications. With the help of Temporal Computing Ltd. and Nokia Bell Labs, our focus will be to demonstrate the chip through two industrial-grade applications: a) Predictive Maintenance and b) Smart Wearables. We envisage that these demonstrations will be crucial for our ambitious goal of forming a spinout company, while also protecting the background intellectual properties. In carrying out these duties the researcher will have to interact with the co-investigators of the project and the other researcher responsible for Tasks 1 and 3 of the project.

 

This post is a Fixed Term contract for a period of 6 months

 

Key Accountabilities

  • Develop a power-compute design method to control the power/performance tradeoffs in the AI compute circuits to interface AI hardware prototype to power management unit.
  • Develop a PCB to incorporate both AI chip and power management unit.
  • Demonstrate the chip through two industrial-grade applications: a) Predictive Maintenance and b) Smart Wearables
  • Collaborate with the partner industry (Nokia Bell Labs and Temporal Computing Ltd) to accelerate impact and industrial take up of the new AI hardware.
  • Conduct industrially-relevant experiments on the AI hardware and publicise the outcomes at conferences, journals, technology exhibitions, and online.

 

The Person (Essential)

Knowledge, Skills and Experience

  • Knowledge of hardware design for Artificial Intelligence.(Essential)
  • Knowledge of Workcraft software tools.(Essential)
  • Presentation skills, experience of presenting to large audience.(Essential)
  • Research experience, a portfolio of previous research (Essential)
  • Knowledge of asynchronous design and energy–efficient computing principles (Essential)

 

Attributes and Behaviour

  • Ambition to lead independent research.(Essential)

 

Qualifications

  • A degree in Electrical and Electronic Engineering, Computer Science or Computer Engineering.(Essential)
  • Experience of FPGA and ASIC development. (Essential)

 

 

Newcastle University is committed to being a fully inclusive Global University which actively recruits, supports and retains staff from all sectors of society.  We value diversity as well as celebrate, support and thrive on the contributions of all our employees and the communities they represent.  We are proud to be an equal opportunities employer and encourage applications from everybody, regardless of race, sex, ethnicity, religion, nationality, sexual orientation, age, disability, gender identity, marital status/civil partnership, pregnancy and maternity, as well as being open to flexible working practices.

 

Requisition ID: 1152